This invention relates to a method for manufacturing a junction type field-effect transistor (longitudinal-type FET) with a longitudinally extended channel.
The prior art transistors of this kind are so formed as shown in FIGS. 1A to 1F, for example, while there will be described in brief the method for manufacturing such transistors.
First, an n-type silicon layer 12 with a low impurity concentration is formed on an n.sup.+ -type silicon substrate 11 forming a drain region, by the epitaxial growth method, and the surface of the layer 12 is oxidized to form a silicon oxide film 13 as shown in FIG. 1A. Then, a part of the film 13 is selectively removed to expose reticulately the n-type silicon layer 12, where a p-type impurity, such as boron, is diffused to form in the silicon layer 12 a p.sup.+ -type layer 14 with a high impurity concentration to form a gate region as shown in FIG. 1B. After completely removing the mask of silicon oxide film 13 from the surface of the silicon layer 12, another silicon oxide film 15 is newly formed on the layer 12. Subsequently, portions of the silicon oxide film 15 surrounded by the gate region 14 are each removed in the shape of a strip, and an n-type impurity, such as arsenic, is diffused through the removed portions, that is, with the silicon oxide film 15 used as a mask, thereby forming in the surface of the n-type silicon layer 12 n.sup.+ -type layers 16 with a high impurity concentration to form a source region as shown in FIG. 1C. A portion of the silicon oxide film 15 on the gate region 14 is selectively etched and removed, and gate electrodes 14a and source electrodes 16a, as shown in FIG. 1D, are formed on the gate region 14 and source regions 16 through the removed portions or openings for forming the source region, respectively. In thus manufactured semiconductor device, as shown in FIG. 1E or plan view of such device, the gate electrodes 14a and the source electrodes 16a are formed in the shape of combs engaging each other. Further, also on the drain region 11 is formed an electrode 11a as shown in FIG. 1D.
In the method for manufacturing longitudinal-type FET's as described above, as regards the formation of the source region 16, an opening in the oxide film for diffusion is identical with one for the takeout of the electrodes, so that its width can be reduced to the minimum size for boring. As regards the gate region 14, however, the oxide film 15 must be newly formed after diffusing the impurity for forming the region 14, requiring further formation of an opening for the takeout of the electrodes in the oxide film by the photoetching method. That is, the opening in the oxide film for forming the region 14 is separate from the opening for the takeout of the electrodes. Therefore, the first opening for diffusion must be wider by a degree corresponding to the error in opening location (mask alignment error). If the minimum size for boring is 1.5 .mu.m and the mask alignment error is .+-.1.0 .mu.m, for example, the opening in the source region 16 may be 1.5 .mu.m wide, though the opening in the gate region 14 should be at least 3.5 .mu.m wide. Accordingly, the area of the gate region 14 is increased and thus the gate-drain capacitance grows larger, thereby deteriorating the high-frequency characteristic. Further, in view of compactification and higher integration, it is not to be desired that the gate region 14 must be widened unnecessarily.